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Intel, Micron launch 34-nm, 32-Gb NAND flash memory at SSDs
 
作者:Ann Steffora Mutschler   来源:EDN    点击数:244   更新时间:2008-6-2
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The companies believe this memory chip uses the industry's most advanced NAND process technology that allows increased storage in small form-factor applications.


Being touted as the smallest NAND process geometry on the market, chip giant Intel Corp and memory leader Micron Technology Inc today rolled out what they say is the first sub-40-nm NAND memory device -- a 34-nm 32-gigabit (Gb) multi-level cell (MLC) NAND memory chip.


Developed and manufactured by the companies at their NAND flash joint venture, IM Flash Technologies (IMFT), the chip is believed to be the only monolithic device at this density that fits into a standard 48-lead thin small-outline package (TSOP), mean to be a cost-effective path to higher densities in existing applications, the companies asserted.


The 34-nm 32-Gb chips will be manufactured on 300-mm wafers, with each wafer capable of holding approximately 1.6 terabytes of NAND. Measuring 172-square-millimeters (less than the size of a thumbnail), the companies said the 34-nm 32 Gb chip is meant to cost-effectively allow high-density solid-state storage in small form factor applications, with a single 32-Gb chip able to store, for example, more than 2,000 high-resolution digital photos or up to 1,000 songs on a personal music player.




Two 8-die stacked packages can hold 64-gigabytes (GBs) of storage, enough for recording anywhere from eight to 40 hours of high-definition video in a digital camcorder, the companies also noted.


Further, with solid state drives (SSDs) becoming the new storage medium for notebook computers, thanks to lower power, faster boot-up time, increased reliability, improved performance and reduced noise than hard disk drives. Intel and Micron said the memory was designed with solid-state drives in mind in order to allow more cost-effective SSDs, and double the current storage volume of these devices, at the same time driving capacities to beyond 256-GBs in today’s 1.8-inch form factor.


Intel and Micron said they plan to introduce lower density multi-level cell products including single-level cell products, by the end of this year.


Customer sample shipments are scheduled to begin in June with mass production expected during the second half of the year.


Market researchers at Objective Analysis view this move as one that will perhaps lengthen today’s oversupply while allowing the new NAND competitors (Micron and Intel) to either profit during these difficult times, or at least to suffer smaller losses than will other suppliers, which should help the companies in their goal to carve out a larger share of the market though aggressive investment and process shrinks.


Also, given that Intel and Micron project about 400 dice per wafer, the price of a 32-Gb chip will be just shy of $4, which works out to about 99 cents per GB, making them the first companies to break the $1/GB barrier with this product, compared to today's MLC NAND prices of approximately $2.50/GB – roughly equivalent to the cost of a 54-nm process MLC chip produced on a 300-mm line, or a 45-nm process MLC NAND on a 200-mm line, Objective Analysis explained.


With NAND makers aiming to ramp 45-nm in volume on a 300-mm line this year, Objective Analysis said a 45-nm MLC NAND on a 300-mm line should cost about $1.75/GB to produce, and that with a 99 cent/GB price, the IMFT chip can be expected to reap impressive margins as long as NAND prices stay above their competitors' costs.


On the other hand, a shift to 34-nm could cause the NAND market to continue to be oversupplied for perhaps longer than Objective Analysis' projection for mid-2009, and such a move might cause an oversupply to last an additional quarter. 

As long as Micron's and Intel's competition manufactures more costly products, these companies will suffer smaller losses than will their competition, which could even lead the highest-cost producers to leave the market, as Renesas did, the market research firm added.


[1]



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