Atmel’s ARM7-based AT91CAP7E microcontroller includes an FPGA interface, a six-layer AHB (advanced high-speed bus), a peripheral-DMA controller, and 160 kbytes of on-chip SRAM. The FPGA interface includes direct access to two AHB masters, four AHB slaves, the peripheral-DMA controller, and a programmable ROM to remap the external RAM to emulate and debug ROM code. Atmel provides FPGA logic to encode and decode the bus traffic that flows between the FPGA and the CAP7E microcontroller. The logic blocks inside the FPGA connect to the CAP7E through the AHB master and slave channels. The priority-interrupt controller supports as many as 13 encoded interrupts and two unencoded interrupts for DMA transfers. On-chip peripherals include a USB 2.0 full-speed device; master and slave SPIs (serial-peripheral interfaces); two USARTs; three 16-bit timer counters; an eight-channel, 10-bit ADC; and a full-function system controller, including interrupt- and power-control and supervisory functions.

The customizable CAP7 has a metal-programmable block with 450,000 gates, or the equivalent of 56,000 FPGA logic cells. You can directly migrate FPGA functions to a CAP7 device with no special EDA tools or customer-side engineering. Standard FPGA-software tools support implementation of functions such as LCD controllers, DSP algorithms, and proprietary customer IP (intellectual property). The AT91CAP7E uses the same development tools as the AT91SAM ARM-based microcontrollers, and it is available now for $9.50 (10,000) in a 225-ball BGA package.