Freescale (飞思卡尔)公司的MPX5050/MPXV5050G系列单片压力传感器在0-85度C的温度范围内的误差小于2.5%,在-40到125度C有温度补偿,采用专利的硅剪切应力进行测量,很容易和带有A/D输入的微控制器一起使用,有广泛的应用.本文就血压监视器设计案例,介绍了MPX5050压力传感器的主要特性,所使用的主要元器件和微控制器MC9S08QE128主要特性,方框图.此外还介绍了血压监视器的方框图以及它的详细的电路图.

The MPX5050/MPXV5050G series piezoresistive transducer is a state-of-theart monolithic silicon pressure sensor designed for a wide range of applications, but particularly those employing a microcontroller or microprocessor with A/D inputs. This patented, single element transducer combines advanced micromachining techniques, thin-film metallization, and bipolar processing to provide an accurate, high level analog output signal that is proportional to the applied pressure.

The MPX5050/MPXV5050G series pressure sensor operating characteristics, and internal reliability and qualification tests are based on use of dry air as the pressure media. Media, other than dry air, may have adverse effects on sensor performance and long-term reliability. Contact the factory for information regarding media compatibility in your application.
MPX5050主要特性:
2.5% Maximum Error over 0度to85度C
Ideally suited for Microprocessor or Microcontroller-Based Systems
Temperature Compensated Over –40度to+125度C
Patented Silicon Shear Stress Strain Gauge
Durable Epoxy Unibody Element
Easy-to-Use Chip Carrier Option



图1.全集成压力传感器电路图

The Blood Pressure Monitor reference design demonstrates how the sensing, data communication and processing capabilities of Freescale products interact to create a complete medical handheld solution.
This Blood Pressure Monitor design was crafted to serve as reference for those designs that need expansion flexibility. Enabled to use both the 8-bit MC9S08QE128 and 32-bit MCF51QE128, both members of the pin-, peripheral- and tool-compatible Flexis QE128 Family, Freescale provides intelligence to medical solutions providing freedom across the performance spectrum.

血压监视器主要特性:
Arterial pressure measurement using up-ramp and down-ramp methods
4 language navigation menu along with voice generator functions to enunciate results (English, Spanish, French, German)
Wireless RF interface implemented with SMAC protocol to send data to other coordinator, router or end devices.
USB connectivity to download historical data stored in MRAM (external memory).
Navigation buttons using proximity sensing
OLED for Graphical Display
Low Power techniques implementation

所采用的主要元件:
传感器:
MPXV5050GP, pressure sensor
MC34940, E-Field proximity sensor
微控制器::
Flexis QE microcontrollers
Flexis JM microcontrollers
收发器:
MC13202, Zigbee Transceiver
存储器:
MR2A16A, 512 Kb MRAM
The Flexis QE128 microcontrollers enable compatibility between low-end and high-end products. This gives designers and developers the ability to design one software and hardware platform and add and detract hardware and software to accommodate the different features in various products.

MC9S08QE128主要特性:
8-Bit HCS08 Central Processor Unit (CPU)
Up to 50.33-MHz HCS08 CPU above 2.4V, 40-MHz CPU above 2.1V, and 20-MHz CPU above 1.8V, across temperature range
HC08 instruction set with added BGND instruction
Support for up to 32 interrupt/reset sources
On-Chip Memory
Flash read/program/erase over full operating voltage and temperature
Random-access memory (RAM)
Security circuitry to prevent unauthorized access to RAM and flash contents
Power-Saving Modes
Two low power stop modes; reduced power wait mode
Peripheral clock enable register can disable clocks to unused modules, reducing currents; allows clocks to remain enabled to specific peripherals in stop3 mode
Very low power external oscillator can be used in stop3 mode to provide accurate clock to active peripherals
Very low power real time counter for use in run, wait, and stop modes with internal and external clock sources
6 μs typical wake up time from stop modes
Clock Source Options
Oscillator (XOSC) — Loop-control Pierce oscillator; Crystal or ceramic resonator range of 31.25 kHz to 38.4 kHz or 1 MHz to 16 MHz
Internal Clock Source (ICS) — FLL controlled by internal or external reference; precision trimming of internal reference allows 0.2% resolution and 2% deviation; supports CPU freq. from 2 to 50.33 MHz
System Protection
Watchdog computer operating properly (COP) reset with option to run from dedicated 1-kHz internal clock source or bus clock
Low-voltage detection with reset or interrupt; selectable trip points
Illegal opcode detection with reset
Flash block protection
Development Support
Single-wire background debug interface
Breakpoint capability to allow single breakpoint setting during in-circuit debugging (plus two more breakpoints)
On-chip in-circuit emulator (ICE) debug module containing two comparators and nine trigger modes. Eight deep FIFO for storing change-of-flow addresses and event-only data. Debug module supports both tag and force breakpoints.
ADC — 24-channel, 12-bit resolution; 2.5 μs conversion time; automatic compare function; 1.7 mV/°C temperature sensor; internal bandgap reference channel; operation in
stop3; fully functional from 3.6V to 1.8V
ACMPx — Two analog comparators with selectable interrupt on rising, falling, or either edge of comparator output; compare option to fixed internal bandgap reference voltage; outputs can be optionally routed to TPM module; operation in stop3
SCIx — Two SCIs with full duplex non-return to zero (NRZ); LIN master extended break generation; LIN slave extended break detection; wake up on active edge
SPIx— Two serial peripheral interfaces with Full-duplex or single-wire bidirectional; Double-buffered transmit and receive; MSB-first or LSB-first shifting
IICx — Two IICs with; Up to 100 kbps with maximum bus loading; Multi-master operation; Programmable slave address; Interrupt driven byte-by-byte data transfer; supports broadcast mode and 10 bit addressing
TPMx — One 6-channel and two 3-channel; Selectable input capture, output compare, or buffered edge- or center-aligned PWMs on each channel
RTC — 8-bit modulus counter with binary or decimal based prescaler; External clock source for precise time base, time-of-day, calendar or task scheduling functions; Free running on-chip low power oscillator (1 kHz) for cyclic wake-up without external components
Input/Output
70 GPIOs and 1 input-only and 1 output-only pin
16 KBI interrupts with selectable polarity
Hysteresis and configurable pull-up device on all input pins; Configurable slew rate and drive strength on all output pins.
SET/CLR registers on 16 pins (PTC and PTE)

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